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ltc3558 1 3558f , lt, ltc, ltm and burst mode are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. typical application features applications description linear usb battery charger with buck and buck-boost regulators the ltc ? 3558 is a usb battery charger with dual high ef- ? ciency switching regulators. the device is ideally suited to power single-cell li-ion/polymer based handheld ap- plications needing multiple supply rails. battery charge current is programmed via the prog pin and the hpwr pin with capability up to 950ma of current at the bat pin. the chrg pin allows battery status to be monitored continuously during the charging process. an internal timer controls charger termination. the part includes monolithic synchronous buck and buck- boost regulators that can provide up to 400ma of output current each and operate at ef? ciencies greater than 90% over the entire li-ion/polymer battery range. the buck- boost regulator can regulate its programmed output voltage at its rated deliverable current over the entire li-ion range without drop out, increasing battery runtime. the ltc3558 is offered in a low pro? le (0.75mm), thermally enhanced, 20-lead (3mm 3mm) qfn package. usb charger plus buck regulator and buck-boost regulator battery charger n standalone usb charger n up to 950ma charge current programmable via single resistor n hpwr input selects 20% or 100% of programmed charge current n ntc input for temperature quali? ed charging n internal timer termination n bad battery detection switching regulators (buck and buck-boost) n up to 400ma output current per regulator n 2.25mhz constant-frequency operation n power saving burst mode ? operation n low pro? le, 20-lead, 3mm 3mm qfn package n sd/flash-based mp3 players n low power handheld applications v cc ntc prog susp hpwr en1 4.7h 10f 649k 324k 10pf 22f 10pf ltc3558 gnd exposed pad 1f 2.2h 1.74k en2 mode bat usb (4.3v to 5.5v) digital control pv in1 pv in2 sw1 fb1 swab2 swcd2 v out2 fb2 v c2 1.2v at 400ma single li-lon cell (2.7v to 4.2v) 105k 324k 15k 121k 3.3v at 400ma 330pf 33pf 3558 ta01 + chrg 10f demo board
ltc3558 2 3558f absolute maximum ratings v cc (transient); t < 1ms and duty cycle < 1% ....................... ?0.3v to 7v v cc (static) .................................................. ?0.3v to 6v bat, chrg ................................................... ?0.3v to 6v prog, susp ................................. ?0.3v to (v cc + 0.3v) hpwr, ntc ................... ?0.3v to max (v cc , bat) + 0.3v prog pin current ...............................................1.25ma bat pin current ..........................................................1a pv in1 , pv in2 ..................................?0.3v to (bat + 0.3v) en1, en2, mode, v out2 .............................. ?0.3v to 6v fb1, sw1 ......................... ?0.3v to (pv in1 + 0.3v) or 6v fb2, v c2 , swab2 ............. ?0.3v to (pv in2 + 0.3v) or 6v swcd2 ............................?0.3v to (v out2 + 0.3v) or 6v i sw1 ............................................................... 600ma dc i swab2 , i swcd2 , i vout2 ................................... 750ma dc junction temperature (note 2) ............................. 125c operating temperature range (note 3).... ?40c to 85c storage temperature .............................. ?65c to 125c (note 1) pin configuration 20 19 18 17 16 7 8 top view 21 ud package 20-lead (3mm 3mm) plastic qfn 9 10 gnd bat mode fb1 en1 en2 v c2 fb2 susp v out2 sw1 pv in1 pv in2 swab2 swcd2 12 11 13 14 15 4 5 3 2 1 6 v cc chrg prog ntc hpwr t jmax = 125c,
ltc3558 3 3558f symbol parameter conditions min typ max units battery charger v cc input supply voltage l 4.3 5.5 v i vcc battery charger quiescent current (note 4) standby mode, charge terminated suspend mode, v susp = 5v 285 8.5 400 17 a a v float bat regulated output voltage 0c t a 85c 4.179 4.165 4.200 4.200 4.221 4.235 v v i chg constant-current mode charge current hpwr = 1 hpwr = 0 l 440 84 460 92 500 100 ma ma i bat battery drain current standby mode, charger terminated, en1 = en2 = 0 shutdown, v cc < v uvlo , bat = 4.2v, en1 = en2 = 0 suspend mode, susp = 5v, bat = 4.2v, en1 = en2 = 0 v cc = 0v, en1 = en2 = 1, mode = 1, fb1 = fb2 = 0.85v, v out2 = 3.6v C3.5 C2.5 C1.5 C50 C7 C4 C3 C100 a a a a v uvlo undervoltage lockout threshold bat = 3.5v, v cc rising 3.85 4 4.125 v ) v uvlo undervoltage lockout hysteresis bat = 3.5v 200 mv v duvlo differential undervoltage lockout threshold bat = 4.05v, (v cc C bat) falling 30 50 70 mv ) v duvlo differential undervoltage lockout hysteresis bat = 4.05v 130 mv v prog prog pin servo voltage hpwr = 1 hpwr = 0 bat < v trkl 1.000 0.200 0.100 v v v h prog ratio of i bat to prog pin current 800 ma/ma i trkl trickle charge current bat < v trkl 36 46 56 ma v trkl trickle charge threshold voltage bat rising 2.8 2.9 3 v ) v trkl trickle charge hysteresis voltage 100 mv ) v rechrg recharge battery threshold voltage threshold voltage relative to v float C75 C95 C115 mv t rechrg recharge comparator filter time bat falling 1.7 ms t term safety timer termination period bat = v float 3.5 4 4.5 hour t badbat bad battery termination time bat < v trkl 0.4 0.5 0.6 hour h c/10 end-of-charge indication current ratio (note 5) 0.085 0.1 0.11 ma/ma t c/10 end-of-charge comparator filter time i bat falling 2.2 ms r on(chg) battery charger power fet on- resistance (between v cc and bat) i bat = 190ma 500 m < t lim junction temperature in constant temperature mode 105 c ntc v cold cold temperature fault threshold voltage rising ntc voltage hysteresis 75 76.5 1.6 78 %v cc %v cc v hot hot temperature fault threshold voltage falling ntc voltage hysteresis 33.4 34.9 1.6 36.4 %v cc %v cc v dis ntc disable threshold voltage falling ntc voltage hysteresis l 0.7 1.7 50 2.7 %v cc mv i ntc ntc leakage current v ntc = v cc = 5v C1 1 a electrical characteristics the l denotes speci? cations that apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v cc = 5v, bat = pv in1 = pv in2 = 3.6v, r prog = 1.74k, unless otherwise noted.
ltc3558 4 3558f symbol parameter conditions min typ max units logic (hpwr, susp , chrg , en1, en2, mode) v il input low voltage hpwr, susp , mode, en1, en2 pins 0.4 v v ih input high voltage hpwr, susp , mode, en1, en2 pins 1.2 v r dn logic pin pull-down resistance hpwr, susp pins l 1.9 4 6.3 m < v chrg chrg pin output low voltage i chrg = 5ma 100 250 mv i chrg chrg pin input current bat = 4.5v, v chrg = 5v 0 1 a buck switching regulator pv in1 input supply voltage l 2.7 4.2 v i pvin1 pulse skip input current burst mode current shutdown current supply current in uvlo fb1 = 0.85v, mode = 0 (note 6) fb1 = 0.85v, mode = 1 (note 6) en1 = 0 pv in1 = pv in2 = 2v l 220 35 0 4 400 50 2 8 a a a a pv in1 uvlo pv in1 falling pv in1 rising l l 2.30 2.45 2.55 2.70 v v f osc switching frequency mode = 0 1.91 2.25 2.59 mhz i limsw1 peak pmos current limit 550 800 1050 ma v fb1 feedback voltage mode = 0 l 780 800 820 mv i fb1 fb input current fb1 = 0.85v C50 50 na d max1 maximum duty cycle fb1 = 0v l 100 % r pmos1 r ds(on) of pmos i sw1 = 100ma 0.65 < r nmos1 r ds(on) of nmos i sw1 = C100ma 0.75 < r sw1(pd) sw pull-down in shutdown 13 k < buck-boost switching regulator pv in2 input supply voltage l 2.7 4.2 v i pvin2 pwm input current burst mode input current shutdown current supply current in uvlo mode = 0, i out = 0a, fb2 = 0.85v (note 6) mode = 1, i out = 0a, fb2 = 0.85v (note 6) en2 = 0, i out = 0a pv in1 = pv in2 = 2v 220 20 0 4 400 30 1 8 a a a a pv in2 uvlo pv in2 falling pv in2 rising l l 2.30 2.45 2.55 2.70 v v v out2(low) minimum regulated buck-boost v out 2.65 2.75 v v out2(high) maximum regulated buck-boost v out 5.45 5.60 v i limf2 forward current limit (switch a) mode = 0 l 580 700 820 ma i peak2(burst) forward current limit (switch a) mode = 1 l 180 250 320 ma i limr2 reverse current limit (switch d) mode = 0 l 325 450 575 ma i zero2(burst) reverse current limit (switch d) mode = 1 l C35 0 35 ma i max2(burst) maximum deliverable output current in burst mode operation 2.7v < pv in2 < 4.2v 2.75v < v out2 < 5.5v 50 ma v fb2 feedback servo voltage l 780 800 820 mv i fb2 fb2 input current fb2 = 0.85v C50 50 na f osc switching frequency mode = 0 1.91 2.25 2.59 mhz electrical characteristics the l denotes speci? cations that apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v cc = 5v, bat = pv in1 = pv in2 = 3.6v, r prog = 1.74k, unless otherwise noted.
ltc3558 5 3558f note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: t j is calculated from the ambient temperature t a and power dissipation p d according to the following formula: t j = t a + (p d ? v ja ) note 3: the ltc3558e is guaranteed to meet speci? cations from 0c to 85c. speci? cations over the C40c to 85c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 4: v cc supply current does not include current through the prog pin or any current delivered to the bat pin. total input current is equal to this speci? cation plus 1.00125 ? i bat where i bat is the charge current. note 5: i c/10 is expressed as a fraction of measured full charge current with indicated prog resistor. note 6: dynamic supply current is higher due to the gate charge being delivered at the switching frequency. symbol parameter conditions min typ max units r dsp(on) pmos r ds(on) v out = 3.6v 0.6 < r dsn(on) nmos r ds(on) 0.6 < i leak(p) pmos switch leakage switches a, d C1 1 a i leak(n) nmos switch leakage switches b, c C1 1 a dc buck(max) maximum buck duty cycle mode = 0 l 100 % dc boost(max) maximum boost duty cycle mode = 0 75 % t ss2 soft-start time 0.5 ms r out(pd) v out pull-down in shutdown 10 k < electrical characteristics the l denotes speci? cations that apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v cc = 5v, bat = pv in1 = pv in2 = 3.6v, r prog = 1.74k, unless otherwise noted.
ltc3558 6 3558f prog voltage vs battery charge current temperature (c) C55 3.9 4.0 4.2 545 3558 g07 3.8 3.7 C35 C15 25 65 85 3.6 3.5 4.1 v cc (v) bat = 3.5v rising falling battery drain current in undervoltage lockout vs temperature temperature (c) C55 i bat (a) 2.0 2.5 3.0 545 3558 g08 1.5 1.0 C35 C15 25 65 85 0.5 0 bat = 4.2v en1 = en2 = 0v bat = 3.6v i bat (ma) 0 v prog (v) 0.4 0.8 1.2 0.2 0.6 1.0 100 200 300 400 3558 g09 500 50 0 150 250 350 450 v cc = 5v hpwr = 5v r prog = 1.74k en1 = en2 = 0v battery charger undervoltage lockout threshold vs temperature temperature (c) C55 0 current (a) 1 3 4 5 10 7 C15 25 45 3558 g01 2 8 9 i vcc 6 C35 5 65 85 v cc = 5v bat = 4.2v susp = 5v en1 = en2 = 0v i bat typical performance characteristics temperature (c) C55 v float (v) 4.23 5 3558 g02 4.20 4.18 C35 C15 25 4.17 4.16 4.24 4.22 4.21 4.19 45 65 85 v cc = 5v i bat (ma) 100 v bat (v) 4.180 4.190 4.205 4.200 900 3558 g03 4.170 4.160 4.175 4.185 4.195 4.165 4.155 4.150 300 500 700 200 0 400 600 800 1000 v cc = 5v hpwr = 5v r prog = 845 en1 = en2 = 0v v cc (v) 4.3 440 i bat (ma) 450 460 470 480 500 4.5 4.6 4.9 5.1 3558 g04 5.3 4.4 4.7 4.8 5.0 5.2 5.4 5.5 490 445 455 465 475 495 485 v cc = 5v hpwr = 5v r prog = 1.74k en1 = en2 = 0v v bat (v) 2 i bat (ma) 300 400 500 4 3558 g05 200 100 250 350 450 150 50 0 2.5 3 3.5 4.5 v cc = 5v r prog = 1.74k hpwr = 5v hpwr = 0v temperature (c) C55 0 i bat (ma) 50 150 200 250 500 350 C15 25 45 125 3558 g06 100 400 450 300 C35 5 65 85 105 v cc = 5v hpwr = 5v r prog = 1.74k en1 = en2 = 0 suspend state supply and bat currents vs temperature battery regulation (float) voltage vs temperature battery regulation (float) voltage vs battery charge current, constant-voltage charging battery charge current vs supply voltage battery charge current vs battery voltage battery charge current vs ambient temperature in thermal regulation t a = 25c, unless otherwise noted.
ltc3558 7 3558f timer accuracy vs temperature buck and buck-boost regulator switching frequency vs temperature temperature (c) C55 C2 percent error (%) C1 1 2 3 25 7 3558 g16 0 C15 C35 45 65 585 4 5 6 v cc = 5v time (hour) 0 i bat (ma) bat (v) chrg (v) 5.0 200 0 400 800 600 1000 35 3558 g17 3.5 3.0 5.0 4.5 4.0 3.0 4.0 1.0 2.0 0 12 4 6 v cc = 5v r prog = 0.845k hpwr = 5v recharge threshold vs temperature battery charger fet on-resistance vs temperature susp/hpwr pin rising thresholds vs temperature chrg pin output low voltage vs temperature timer accuracy vs supply voltage temperature (c) C55 75 v recharge (mv) 79 87 91 95 115 103 C15 25 45 3558 g10 83 107 111 99 C35 5 65 85 v cc = 5v temperature (c) C55 r ds(on) (m) 500 550 600 85 3558 g11 450 400 300 C35 C15 5 25 45 65 350 700 650 v cc = 4v i bat = 200ma en1 = en2 = 0v temperature (c) C55 threshold (v) 1.1 5 3558 g12 0.8 0.6 C35 C15 25 0.5 0.4 1.2 1.0 0.9 0.7 45 65 85 v cc = 5v temperature (c) C55 80 100 140 545 3558 g13 60 40 C35 C15 25 65 85 20 0 120 voltage (mv) v cc = 5v i chrg = 5ma chrg pin i-v curve chrg (v) 0 70 60 50 40 30 20 10 0 35 3558 g14 12 46 i chrg (ma) v cc = 5v bat = 3.8v v cc (v) 4.3 C1.0 percent error (%) C0.5 0 0.5 1.0 2.0 4.5 4.7 4.9 5.1 3558 g15 5.3 5.5 1.5 typical performance characteristics complete charge cycle 2400mah battery temperature (c) C55 1.725 frequency (mhz) 1.825 2.025 2.125 2.225 2.425 C15 25 45 125 3558 g18 1.925 2.325 C35 5 65 85 105 bat = 4.2v bat = 2.7v bat = 3.6v v cc = 0v, mode = 0 bat = pv in1 = pv in2 t a = 25c, unless otherwise noted.
ltc3558 8 3558f buck regulator input current vs temperature, pulse skip mode buck and buck-boost regulator enable thresholds vs temperature buck regulator pmos r ds(0n) vs temperature temperature (c) C55 100 input current (a) 150 250 300 350 C15 25 45 125 3558 g22 200 C35 5 65 85 105 400 fb1 = 0.85v pv in1 = 4.2v pv in1 = 2.7v temperature (c) C55 400 r ds(on) (m) 500 700 800 900 65 1300 3558 g23 600 5 C35 85 25 C15 105 45 12 5 1000 1100 1200 pv in1 = 2.7v pv in1 = 4.2v buck regulator nmos r ds(0n) vs temperature temperature (c) C55 400 r ds(on) (m) 500 700 800 900 65 1300 3558 g24 600 5 C35 85 25 C15 105 45 12 5 1000 1100 1200 pv in1 = 2.7v pv in1 = 4.2v typical performance characteristics buck regulator input current vs temperature, burst mode operation temperature (c) C55 20 input current (a) 25 35 40 45 C15 25 45 125 3558 g21 30 C35 5 65 85 105 50 fb1 = 0.85v pv in1 = 4.2v pv in1 = 2.7v buck and buck-boost regulator undervoltage thresholds vs temperature i load (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 0.1 10 100 1000 3558 g25 0 1 v out = 1.2v pv in1 = 2.7v pv in1 = 4.2v burst mode operation pulse skip mode buck regulator ef? ciency vs i load buck regulator load regulation i load (ma) 1 1.19 v out (v) 1.20 1.21 1.22 1.23 10 100 100 0 3558 g26 1.18 1.17 1.16 1.15 1.24 1.25 pv in1 = 3.6v v out = 1.2v burst mode operation pulse skip mode buck regulator line regulation temperature (c) C55 2.250 input voltage (v) 2.300 2.400 2.450 2.500 2.750 2.600 C15 25 45 125 3558 g19 2.350 2.650 2.700 2.550 C35 5 65 85 105 rising bat = pv in1 = pv in2 falling temperature (c) C55 400 v en (v) 500 700 800 900 1200 1100 C15 25 45 125 3558 g20 600 1000 C35 5 65 85 105 rising bat = pv in1 = pv in2 = 3.6v falling 2.700 3.300 3.900 4.200 3.000 3.600 pv in1 (v) v out (v) 1.170 1.220 1.230 1.240 1.250 1.200 1.160 1.210 1.150 1.190 1.180 3558 g27 i load = 200ma t a = 25c, unless otherwise noted.
ltc3558 9 3558f buck regulator start-up transient buck regulator pulse skip mode operation v out 500mv/div en 2v/div pv in1 = 3.8v pulse skip mode load = 6 50s/div 3558 g28 inductor current i l = 200ma/ div buck regulator burst mode operation v out 20mv/ div (ac) sw 2v/div pv in1 = 3.8v load = 10ma 200ns/div 3558 g29 inductor current i l = 50ma/ div v out 20mv/ div (ac) sw 2v/div pv in1 = 3.8v load = 60ma 2s/div 3558 g30 inductor current i l = 60ma/ div typical performance characteristics buck regulator transient response, pulse skip mode v out 50mv/ div (ac) load step 5ma to 290ma pv in1 = 3.8v 50s/div 3558 g31 inductor current i l = 200ma/ div buck regulator transient response, burst mode operation v out 50mv/ div (ac) load step 5ma to 290ma pv in1 = 3.8v 50s/div 3558 g32 inductor current i l = 200ma/ div buck-boost regulator input current vs temperature buck-boost regulator input current vs temperature buck-boost regulator pmos r ds(on) vs temperature buck-boost regulator nmos r ds(on) vs temperature temperature (c) C55 5 input current (a) 10 20 25 30 C15 25 45 125 3558 g33 15 C35 5 65 85 105 burst mode operation fb2 = 0.85v pv in2 = 2.7v pv in2 = 4.2v temperature (c) C55 100 input current (a) 150 250 300 350 500 450 C15 25 45 125 3558 g34 200 400 C35 5 65 85 105 pv in2 = 2.7v pv in2 = 4.2v pwm mode fb2 = 0.85v C55 C15 25 45 125 C35 5 65 85 105 temperature (c) r ds(on) (m) 400 650 700 750 800 300 550 350 600 250 200 500 450 3558 g35 pv in2 = 2.7v pv in2 = 4.2v temperature (c) C55 200 r ds(on) (m) 300 500 600 700 1200 900 C15 25 45 125 3558 g36 400 1000 1100 800 C35 5 65 85 105 pv in2 = 2.7v pv in2 = 4.2v t a = 25c, unless otherwise noted.
ltc3558 10 3558f typical performance characteristics buck-boost regulator start-up transient, pwm mode buck-boost regulator start-up transient, burst mode operation buck-boost regulator line regulation buck-boost regulator ef? ciency vs input voltage buck-boost ef? ciency vs load current buck-boost regulator load regulation 2.700 3.300 3.900 4.200 3.000 3.600 pv in2 (v) efficiency (%) 60 85 90 95 100 75 55 80 50 70 65 3558 g37 i load = 100ma i load = 400ma i load = 10ma i load = 1ma v out = 3.3v burst mode operation pwm mode i load (ma) 3.27 v out (v) 3.29 3.31 3.33 3.35 0.10 10 100 1000 3.24 3.25 1 3.36 3.28 3.30 3.32 3.34 3.26 3558 g39 pwm mode burst mode operation pv in2 = 3.6v 2.700 3.300 3.900 4.200 3.000 3.600 pv in2 (v) v out (v) 3.28 3.33 3.34 3.35 3.36 3.26 3.31 3.27 3.32 3.25 3.24 3.30 3.29 3558 g40 pwm mode i load = 100ma burst mode operation i load = 10ma i load (ma) 30 efficiency (%) 50 70 90 0 10 100 40 60 80 20 3558 g38 3.6v 4.2v 3.6v 4.2v 2.7v 2.7v v out = 3.3v pv in2 , burst mode operation pv in2 , pwm mode 0.10 10 100 1000 1 v out 1v/div en2 1v/div 100s/div 3558 g41 inductor current i l = 200ma/div pv in2 = 3.6v r load = 332 v out 1v/div en2 1v/div 100s/div 3558 g42 inductor current i l = 200ma/div pv in2 = 3.6v r load = 16 t a = 25c, unless otherwise noted.
ltc3558 11 3558f pin functions gnd (pin 1): ground. connect to exposed pad (pin 21). bat (pin 2): charge current output. provides charge cur- rent to the battery and regulates ? nal ? oat voltage to 4.2v. mode (pin 3): mode pin for switching regulators. when held high, both regulators operate in burst mode opera- tion. when held low, the buck regulator operates in pulse skip mode and the buck-boost regulator operates in pwm mode. this pin is a high impedance input; do not ? oat. fb1 (pin 4): buck regulator feedback voltage pin. re- ceives feedback by a resistor divider connected across the output. en1 (pin 5): enable input pin for the buck regulator. this pin is a high impedance input; do not ? oat. active high. sw1 (pin 6): buck regulator switching node. external inductor connects to this node. pv in1 (pin 7): input supply pin for buck regulator. con- nect to bat and pv in2 . a single 10f input decoupling capacitor to gnd is required. pv in2 (pin 8): input supply pin for buck-boost regulator. connect to bat and pv in1 . a single 10f input decoupling capacitor to gnd is required. swab2 (pin 9): switch node for buck-boost regulator connected to the internal power switches a and b. external inductor connects between this node and swcd2. swcd2 (pin 10): switch node for buck-boost regulator connected to the internal power switches c and d. external inductor connects between this node and swab2. v out2 (pin 11): regulated output voltage for buck-boost regulator. susp (pin 12): suspend battery charging operation. a voltage greater than 1.2v on this pin puts the battery char- ger in suspend mode, disables the charger and resets the termination timer. a weak pull-down current is internally applied to this pin to ensure it is low at power-up when the input is not being driven externally. fb2 (pin 13): buck-boost regulator feedback voltage pin. receives feedback by a resistor divider connected across the output. v c2 (pin 14): output of the error ampli? er and voltage compensation node for the buck-boost regulator. ex- ternal type i or type iii compensation (to fb2) connects to this pin. en2 (pin 15): enable input pin for the buck-boost regu- lator. this pin is a high impedance input; do not ? oat. active high. hpwr (pin 16): high current battery charging enabled. a voltage greater than 1.2v at this pin programs the bat pin current at 100% of the maximum programmed charge current. a voltage less than 0.4v sets the bat pin current to 20% of the maximum programmed charge current. when used with a 1.74k prog resistor, this pin can toggle between low power and high power modes per usb speci? cation. a weak pull-down current is internally applied to this pin to ensure it is low at power-up when the input is not being driven externally. ntc (pin 17): input to the ntc thermistor monitoring circuit. the ntc pin connects to a negative temperature coef? cient thermistor which is typically co-packaged with the battery pack to determine if the battery is too hot or too cold to charge. if the battery temperature is out of range, charging is paused until the battery temperature re-enters the valid range. a low drift bias resistor is required from v cc to ntc and a thermistor is required from ntc to ground. to disable the ntc function, the ntc pin should be tied to ground. prog (pin 18): charge current program and charge current monitor pin. charge current is programmed by connecting a resistor from prog to ground. when charg- ing in constant-current mode, the prog pin servos to 1v if the hpwr pin is pulled high, or 200mv if the hpwr pin is pulled low. the voltage on this pin always represents the bat pin current through the following formula: i prog r bat prog = ?800 chrg (pin 19): open-drain charge status output. the chrg pin indicates the status of the battery charger. four possible states are represented by chrg charging, not charging (i.e., the charge current is less than one-tenth
ltc3558 12 3558f block diagram of the full-scale charge current), unresponsive battery (i.e., the battery voltage remains below 2.9v after one half hour of charging) and battery temperature out of range. chrg requires a pull-up resistor and/or led to provide indication. v cc (pin 20): battery charger input. a 1f decoupling capacitor to gnd is recommended. exposed pad (pin 21): ground. the exposed pad must be soldered to pcb ground to provide electrical contact and rated thermal performance. pin functions 19 C + t a 800x bat 1x t die t die pv in1 ot ca ntca ntc ref logic chrg 20 2 prog battery charger buck regulator control logic mode en clk 0.8v 18 pv in1 7 sw1 6 pv in2 8 v out2 swab2 d c a b 9 1 21 v cc 16 hpwr 12 susp ntc mode mp mn en1 en2 fb1 maxer v cc bat body C + g m buck-boost regulator 3558 bd control logic mode en v c2 gnd exposed pad clk 0.8v C + undervoltage lockout die temperature error amp bandgap oscillator 2.25mhz v ref = 0.8v clk 17 3 5 15 4 fb2 13 v c2 14 11 swcd2 10 pv in2
ltc3558 13 3558f operation the ltc3558 is a linear battery charger with a monolithic synchronous buck regulator and a monolithic synchro- nous buck-boost regulator. the buck regulator is inter- nally compensated and needs no external compensation components. the battery charger employs a constant-current, constant- voltage charging algorithm and is capable of charging a single li-ion battery at charging currents up to 950ma. the user can program the maximum charging current available at the bat pin via a single prog resistor. the actual bat pin current is set by the status of the hpwr pin. for proper operation, the bat, pv in1 and pv in2 pins must be tied together, as shown in figure 1. cur- rent being delivered at the bat pin is 500ma. both switching regulators are enabled. the sum of the average input currents drawn by both switching regulators is 200ma. this makes the effective battery charging cur- rent only 300ma. if the hpwr pin were tied lo, the bat pin current would be 100ma. with the switching regulator conditions unchanged, this would cause the battery to discharge at 100ma. figure 1. for proper operation, the bat, pv in1 and pv in2 pins must be tied together applications information battery charger introduction the ltc3558 has a linear battery charger designed to charge single-cell lithium-ion batteries. the charger uses a constant-current/constant-voltage charge algorithm with a charge current programmable up to 950ma. ad- ditional features include automatic recharge, an internal termination timer, low-battery trickle charge conditioning, bad-battery detection, and a thermistor sensor input for out of temperature charge pausing. furthermore, the battery charger is capable of operating from a usb power source. in this application, charge current can be programmed to a maximum of 100ma or 500ma per usb power speci? cations. input current vs charge current the battery charger regulates the total current delivered to the bat pin; this is the charge current. to calculate the total input current (i.e., the total current drawn from the v cc pin), it is necessary to sum the battery charge current, charger quiescent current and prog pin current. undervoltage lockout (uvlo) the undervoltage lockout circuit monitors the input volt- age (v cc ) and disables the battery charger until v cc rises above v uvlo (typically 4v). 200mv of hysteresis prevents oscillations around the trip point. in addition, a differential undervoltage lockout circuit disables the battery charger v cc prog r prog susp hpwr en1 500ma ltc3558 en2 mode high high high low bat usb (5v) pv in1 pv in2 sw1 v out1 single li-lon cell 3.6v 200ma 300ma 3558 f01 10f + 2.2h swab2 swcd2 v out2 +
ltc3558 14 3558f applications information when v cc falls to within v duvlo (typically 50mv) of the bat voltage. suspend mode the battery charger can also be disabled by pulling the susp pin above 1.2v. in suspend mode, the battery drain current is reduced to 1.5a and the input current is reduced to 8.5a. charge cycle overview when a battery charge cycle begins, the battery charger ? rst determines if the battery is deeply discharged. if the battery voltage is below v trkl , typically 2.9v, an automatic trickle charge feature sets the battery charge current to 10% of the full-scale value. once the battery voltage is above 2.9v, the battery charger begins charging in constant-current mode. when the battery voltage approaches the 4.2v required to maintain a full charge, otherwise known as the ? oat voltage, the charge current begins to decrease as the battery charger switches into constant-voltage mode. trickle charge and defective battery detection any time the battery voltage is below v trkl , the charger goes into trickle charge mode and reduces the charge current to 10% of the full-scale current. if the battery voltage remains below v trkl for more than 1/2 hour, the charger latches the bad-battery state, automatically termi- nates, and indicates via the chrg pin that the battery was unresponsive. if for any reason the battery voltage rises above v trkl , the charger will resume charging. since the charger has latched the bad-battery state, if the battery voltage then falls below v trkl again but without rising past v rechrg ? rst, the charger will immediately assume that the battery is defective. to reset the charger (i.e., when the dead battery is replaced with a new battery), simply remove the input voltage and reapply it or put the part in and out of suspend mode. charge termination the battery charger has a built-in safety timer that sets the total charge time for 4 hours. once the battery voltage rises above v rechrg (typically 4.105v) and the charger enters constant-voltage mode, the 4-hour timer is started. after the safety timer expires, charging of the battery will discontinue and no more current will be delivered. automatic recharge after the battery charger terminates, it will remain off, drawing only microamperes of current from the battery. if the portable product remains in this state long enough, the battery will eventually self discharge. to ensure that the battery is always topped off, a charge cycle will automati- cally begin when the battery voltage falls below v rechrg (typically 4.105v). in the event that the safety timer is running when the battery voltage falls below v rechrg , it will reset back to zero. to prevent brief excursions below v rechrg from resetting the safety timer, the battery voltage must be below v rechrg for more than 1.7ms. the charge cycle and safety timer will also restart if the v cc uvlo or duvlo cycles low and then high (e.g., v cc is removed and then replaced) or the charger enters and then exits suspend mode. programming charge current the prog pin serves both as a charge current program pin, and as a charge current monitor pin. by design, the prog pin current is 1/800th of the battery charge current. therefore, connecting a resistor from prog to ground programs the charge current while measuring the prog pin voltage allows the user to calculate the charge current. full-scale charge current is de? ned as 100% of the con- stant-current mode charge current programmed by the prog resistor. in constant-current mode, the prog pin servos to 1v if hpwr is high, which corresponds to charg- ing at the full-scale charge current, or 200mv if hpwr is low, which corresponds to charging at 20% of the full- scale charge current. thus, the full-scale charge current and desired program resistor for a given full-scale charge current are calculated using the following equations: i v r r v i chg prog prog chg = = 800 800
ltc3558 15 3558f applications information in any mode, the actual battery current can be determined by monitoring the prog pin voltage and using the follow- ing equation: i prog r bat prog = ?800 thermal regulation to prevent thermal damage to the ic or surrounding components, an internal thermal feedback loop will auto- matically decrease the programmed charge current if the die temperature rises to approximately 115c. thermal regulation protects the battery charger from excessive temperature due to high power operation or high ambient thermal conditions and allows the user to push the limits of the power handling capability with a given circuit board design without risk of damaging the ltc3558 or external components. the bene? t of the ltc3558 battery charger thermal regulation loop is that charge current can be set according to actual conditions rather than worst-case conditions with the assurance that the battery charger will automatically reduce the current in worst-case con- ditions. charge status indication the chrg pin indicates the status of the battery charger. four possible states are represented by chrg charging, not charging, unresponsive battery and battery temperature out of range. the signal at the chrg pin can be easily recognized as one of the above four states by either a human or a micropro- cessor. the chrg pin, which is an open-drain output, can drive an indicator led through a current limiting resistor for human interfacing, or simply a pull-up resistor for microprocessor interfacing. to make the chrg pin easily recognized by both humans and microprocessors, the pin is either a low for charging, a high for not charging, or it is switched at high frequency (35khz) to indicate the two possible faults: unresponsive battery and battery temperature out of range. when charging begins, chrg is pulled low and remains low for the duration of a normal charge cycle. when the charge current has dropped to below 10% of the full-scale current, the chrg pin is released (high impedance). if a fault occurs after the chrg pin is released, the pin re- mains high impedance. however, if a fault occurs before the chrg pin is released, the pin is switched at 35khz. while switching, its duty cycle is modulated between a high and low value at a very low frequency. the low and high duty cycles are disparate enough to make an led appear to be on or off thus giving the appearance of blinking. each of the two faults has its own unique blink rate for human recognition as well as two unique duty cycles for microprocessor recognition. table 1 illustrates the four possible states of the chrg pin when the battery charger is active. table 1. chrg output pin status frequency modulation (blink) frequency duty cycle charging 0hz 0 hz (lo-z) 100% i bat < c/10 0hz 0 hz (hi-z) 0% ntc fault 35khz 1.5hz at 50% 6.25%, 93.75% bad battery 35khz 6.1hz at 50% 12.5%, 87.5% an ntc fault is represented by a 35khz pulse train whose duty cycle alternates between 6.25% and 93.75% at a 1.5hz rate. a human will easily recognize the 1.5hz rate as a slow blinking which indicates the out of range battery temperature while a microprocessor will be able to decode either the 6.25% or 93.75% duty cycles as an ntc fault. if a battery is found to be unresponsive to charging (i.e., its voltage remains below v trkl for over 1/2 hour), the chrg pin gives the battery fault indication. for this fault, a human would easily recognize the frantic 6.1hz fast blinking of the led while a microprocessor would be able to decode either the 12.5% or 87.5% duty cycles as a bad battery fault. although very improbable, it is possible that a duty cycle reading could be taken at the bright-dim transition (low duty cycle to high duty cycle). when this happens the duty cycle reading will be precisely 50%. if the duty cycle reading is 50%, system software should disqualify it and take a new duty cycle reading.
ltc3558 16 3558f ntc thermistor the battery temperature is measured by placing a nega- tive temperature coef? cient (ntc) thermistor close to the battery pack. the ntc circuitry is shown in figure 3. to use this feature, connect the ntc thermistor, r ntc , between the ntc pin and ground, and a bias resistor, r nom , from v cc to ntc. r nom should be a 1% resistor with a value equal to the value of the chosen ntc thermistor at 25c (r25). a 100k thermistor is recommended since thermistor current is not measured by the battery charger and its current will have to be considered for compliance with usb speci? cations. the battery charger will pause charging when the re- sistance of the ntc thermistor drops to 0.54 times the applications information value of r25 or approximately 54k (for a vishay curve 1 thermistor, this corresponds to approximately 40c). if the battery charger is in constant-voltage mode, the safety timer will pause until the thermistor indicates a return to a valid temperature. as the temperature drops, the resistance of the ntc thermistor rises. the battery charger is also designed to pause charging when the value of the ntc thermistor increases to 3.25 times the value of r25. for a vishay curve 1 thermistor, this resistance, 325k, corresponds to approximately 0c. the hot and cold comparators each have approximately 3c of hysteresis to prevent oscillation about the trip point. grounding the ntc pin disables all ntc functionality. if susp < 0.4v and v cc > 4v and v cc > bat + 130mv? duvlo, uvlo and suspend disable mode 1/10 full charge current chrg strong pull-down 30 minute timer begins trickle charge mode full charge current chrg strong pull-down constant current mode battery charging suspended chrg pulses ntc fault no charge current chrg pulses defective battery 4-hour termination timer begins constant voltage mode no charge current chrg high impedance standby mode chrg high impedance 3558 f02 bat b 2.9v bat > 2.9v 2.9v < bat < 4.105v 30 minute timeout bat drops below 4.105v 4-hour termination timer resets yes no fault fault no power on 4-hour timeout figure 2. state diagram of battery charger operation
ltc3558 17 3558f alternate ntc thermistors and biasing the battery charger provides temperature quali? ed charging if a grounded thermistor and a bias resistor are connected to the ntc pin. by using a bias resistor whose value is equal to the room temperature resistance of the thermistor (r25) the upper and lower temperatures are pre-programmed to approximately 40c and 0c, respec- tively (assuming a vishay curve 1 thermistor). the upper and lower temperature thresholds can be ad- justed by either a modi? cation of the bias resistor value or by adding a second adjustment resistor to the circuit. if only the bias resistor is adjusted, then either the upper or the lower threshold can be modi? ed but not both. the other trip point will be determined by the characteristics of the thermistor. using the bias resistor in addition to an adjustment resistor, both the upper and the lower tempera- ture trip points can be independently programmed with the constraint that the difference between the upper and lower temperature thresholds cannot decrease. examples of each technique are given below. ntc thermistors have temperature characteristics which are indicated on resistance-temperature conversion tables. the vishay-dale thermistor nths0603n011-n1003f, used in the following examples, has a nominal value of 100k and follows the vishay curve 1 resistance-temperature characteristic. in the explanation below, the following notation is used. r25 = value of the thermistor at 25c r ntc|cold = value of thermistor at the cold trip point r ntc|hot = value of the thermistor at the hot trip point r cold = ratio of r ntc|cold to r25 r hot = ratio of r ntc|hot to r25 r nom = primary thermistor bias resistor (see figure 3) r1 = optional temperature range adjustment resistor (see figure 4) the trip points for the battery chargers temperature quali- ? cation are internally programmed at 0.349 ? v cc for the hot threshold and 0.765 ? v cc for the cold threshold. therefore, the hot trip point is set when: r rr vv ntc hot nom ntc hot cc cc | | ?.? + = 0 349 and the cold trip point is set when: r rr vv ntc cold nom ntc cold cc cc | | ?.? + = 0 765 solving these equations for r ntc|cold and r ntc|hot results in the following: r ntc|hot = 0.536 ? r nom and r ntc|cold = 3.25 ? r nom by setting r nom equal to r25, the above equations result in r hot = 0.536 and r cold = 3.25. referencing these ratios to the vishay resistance-temperature curve 1 chart gives a hot trip point of about 40c and a cold trip point of about 0c. the difference between the hot and cold trip points is approximately 40c. by using a bias resistor, r nom , different in value from r25, the hot and cold trip points can be moved in either direction. the temperature span will change somewhat due to the nonlinear behavior of the thermistor. the following equations can be used to easily calculate a new value for the bias resistor: r r r r r r nom hot nom cold = = 0 536 25 325 25 . ? . ? where r hot and r cold are the resistance ratios at the de- sired hot and cold trip points. note that these equations are linked. therefore, only one of the two trip points can be chosen, the other is determined by the default ratios designed in the ic. consider an example where a 60c hot trip point is desired. from the vishay curve 1 r-t characteristics, r hot is 0.2488 at 60c. using the above equation, r nom should be set applications information
ltc3558 18 3558f applications information to 46.4k. with this value of r nom , the cold trip point is about 16c. notice that the span is now 44c rather than the previous 40c. the upper and lower temperature trip points can be inde- pendently programmed by using an additional bias resistor as shown in figure 4. the following formulas can be used to compute the values of r nom and r 1 : r rr r rrr nom cold hot nom hot = = C . ? .? C ? 2 714 25 1 0 536 r r25 for example, to set the trip points to 0c and 45c with a vishay curve 1 thermistor choose: rkk nom == 3 266 0 4368 2 714 100 104 2 .C. . ?. the nearest 1% value is 105k. r1 = 0.536 ? 105k C 0.4368 ? 100k = 12.6k the nearest 1% value is 12.7k. the ? nal solution is shown in figure 4 and results in an upper trip point of 45c and a lower trip point of 0c. 3558 f03 r nom 100k r ntc 100k C + C + C + too_cold too_hot ntc_enable 0.765 ? v cc (ntc rising) ntc block 0.349 ? v cc (ntc falling) 17 ntc 20 v cc 0.017 ? v cc (ntc falling) 3558 f04 r nom 105k r ntc 100k C + C + C + too_cold too_hot ntc_enable r1 12.7k 0.765 ? v cc (ntc rising) 0.349 ? v cc (ntc falling) 17 ntc 0.017 ? v cc (ntc falling) 20 v cc figure 3. typical ntc thermistor circuit figure 4. ntc thermistor circuit with additional bias resistor
ltc3558 19 3558f applications information usb and wall adapter power although the battery charger is designed to draw power from a usb port to charge li-ion batteries, a wall adapter can also be used. figure 5 shows an example of how to combine wall adapter and usb power inputs. a p-channel mosfet, mp1, is used to prevent back conduction into the usb port when a wall adapter is present and schottky diode, d1, is used to prevent usb power loss through the 1k pull-down resistor. typically, a wall adapter can supply signi? cantly more current than the 500ma-limited usb port. therefore, an n-channel mosfet, mn1, and an extra program resistor are used to increase the maximum charge current to 950ma when the wall adapter is present. current. it is not necessary to perform any worst-case power dissipation scenarios because the ltc3558 will automatically reduce the charge current to maintain the die temperature at approximately 105c. however, the approximate ambient temperature at which the thermal feedback begins to protect the ic is: tcp tcvvi adja a cc bat bat ja = = () 105 105 C CC ?? v v example: consider an ltc3558 operating from a usb port providing 500ma to a 3.5v li-ion battery. the ambient temperature above which the ltc3558 will begin to reduce the 500ma charge current is approximately: tcvvmacw tc a a = ()() = 105 5 3 5 500 68 105 0 CC.? ? / C.. ? / C 75 68 105 51 54 wcw c c tc a = = the ltc3558 can be used above 70c, but the charge cur- rent will be reduced from 500ma. the approximate current at a given ambient temperature can be calculated: i ct vv bat a cc bat ja = () 105 C C? v using the previous example with an ambient tem- perature of 88c, the charge current will be reduced to approximately: i cc vv cw c ca bat = () = 105 88 535 68 17 102 C C. ? / / i ima bat = 167 furthermore, the voltage at the prog pin will change proportionally with the charge current as discussed in the programming charge current section. it is important to remember that ltc3558 applications do not need to be designed for worst-case thermal conditions since the ic will automatically reduce power dissipation when the junction temperature reaches approximately 105c. v cc mp1 mn1 1k 1.74k 1.65k i bat li-ion battery 3558 f05 battery charger bat usb power 500ma i chg 5v wall adapter 950ma i chg prog + d1 figure 5. combining wall adapter and usb power power dissipation the conditions that cause the ltc3558 to reduce charge current through thermal feedback can be approximated by considering the power dissipated in the ic. for high charge currents, the ltc3558 power dissipation is approximately: pvv i d cc bat bat = () C? where p d is the power dissipated, v cc is the input supply voltage, v bat is the battery voltage, and i bat is the charge
ltc3558 20 3558f battery charger stability considerations the ltc3558 battery charger contains two control loops: the constant-voltage and constant-current loops. the constant- voltage loop is stable without any compensation when a battery is connected with low impedance leads. excessive lead length, however, may add enough series inductance to require a bypass capacitor of at least 1.5f from bat to gnd. furthermore, a 4.7f capacitor with a 0.2 < to 1 < series resistor from bat to gnd is required to keep ripple voltage low when the battery is disconnected. high value capacitors with very low esr (especially ceramic) reduce the constant-voltage loop phase margin, possibly resulting in instability. ceramic capacitors up to 22f may be used in parallel with a battery, but larger ceramics should be decoupled with 0.2 < to 1 < of series resistance. in constant-current mode, the prog pin is in the feedback loop, not the battery. because of the additional pole created by the prog pin capacitance, capacitance on this pin must be kept to a minimum. with no additional capacitance on the prog pin, the charger is stable with program resistor values as high as 25k. however, additional capacitance on this node reduces the maximum allowed program resis- tor. the pole frequency at the prog pin should be kept above 100khz. therefore, if the prog pin is loaded with a capacitance, c prog , the following equation should be used to calculate the maximum resistance value for r prog : r c prog prog f 1 210 5 u ?? applications information average, rather than instantaneous, battery current may be of interest to the user. for example, if a switching power supply operating in low-current mode is connected in parallel with the battery, the average current being pulled out of the bat pin is typically of more interest than the instantaneous current pulses. in such a case, a simple rc ? lter can be used on the prog pin to measure the average battery current as shown in figure 6. a 10k resistor has been added between the prog pin and the ? lter capacitor to ensure stability. usb inrush limiting when a usb cable is plugged into a portable product, the inductance of the cable and the high-q ceramic input capacitor form an l-c resonant circuit. if there is not much impedance in the cable, it is possible for the voltage at the input of the product to reach as high as twice the usb voltage (~10v) before it settles out. in fact, due to the high voltage coef? cient of many ceramic capacitors (a nonlinearity), the voltage may even exceed twice the usb voltage. to prevent excessive voltage from damag- ing the ltc3558 during a hot insertion, the soft connect circuit in figure 7 can be employed. in the circuit of figure 7, capacitor c1 holds mp1 off when the cable is ? rst connected. eventually c1 begins to charge up to the usb input voltage applying increasing gate support to mp1. the long time constant of r1 and c1 prevents the current from building up in the cable too fast thus dampening out any resonant overshoot. 3558 f06 c filter charge current monitor circuitry r prog ltc3558 prog gnd 10k figure 6. isolated capacitive load on prog pin and filtering r1 40k 5v usb input 3558 f07 c1 100nf c2 10f mp1 si2333 usb cable v cc gnd ltc3558 figure 7. usb soft connect circuit
ltc3558 21 3558f applications information buck switching regulator general information the ltc3558 contains a 2.25mhz constant-frequency current mode buck switching regulator that can provide up to 400ma. the switcher can be programmed for a minimum output voltage of 0.8v and can be used to power a microcontroller core, microcontroller i/o, memory or other logic circuitry. the regulator supports 100% duty cycle operation (dropout mode) when the input voltage drops very close to the output voltage and is also capable of operating in burst mode operation for highest ef? cien- cies at light loads (burst mode operation is pin selectable). the buck switching regulator also includes soft-start to limit inrush current when powering on, short-circuit cur- rent protection, and switch node slew limiting circuitry to reduce radiated emi. a mode pin sets the buck switching regulator in burst mode operation or pulse skip operating mode. the regula- tor is enabled individually through its enable pin. the buck regulator input supply (pv in1 ) should be connected to the battery pin (bat) and pv in2 . this allows the undervoltage lockout circuit on the bat pin to disable the buck regulators when the bat voltage drops below 2.45v. do not drive the buck switching regulator from a voltage other than bat. a 10f decoupling capacitor from the pv in1 pin to gnd is recommended. buck switching regulator output voltage programming the buck switching regulator can be programmed for output voltages greater than 0.8v. the output voltage for the buck switching regulator is programmed using a resistor divider from the switching regulator output con- nected to its feedback pin (fb1), as shown in figure 8, such that: v out = 0.8(1 + r1/r2) typical values for r1 are in the range of 40k to 1m. the capacitor c fb cancels the pole created by feedback re- sistors and the input capacitance of the fb pin and also helps to improve transient response for output voltages much greater than 0.8v. a variety of capacitor sizes can be used for c fb but a value of 10pf is recommended for most applications. experimentation with capacitor sizes between 2pf and 22pf may yield improved transient response if so desired by the user. buck switching regulator operating modes the buck switching regulator includes two possible oper- ating modes to meet the noise/power needs of a variety of applications. in pulse skip mode, an internal latch is set at the start of every cycle, which turns on the main p-channel mosfet pwm control gnd en mode 0.8v mn fb mp c fb v out p vin c o r1 r2 l sw 3558 f08 figure 8. buck converter application circuit
ltc3558 22 3558f applications information switch. during each cycle, a current comparator compares the peak inductor current to the output of an error ampli? er. the output of the current comparator resets the internal latch, which causes the main p-channel mosfet switch to turn off and the n-channel mosfet synchronous recti? er to turn on. the n-channel mosfet synchronous recti? er turns off at the end of the 2.25mhz cycle or if the current through the n-channel mosfet synchronous recti? er drops to zero. using this method of operation, the error ampli? er adjusts the peak inductor current to deliver the required output power. all necessary compensation is internal to the buck switching regulator requiring only a single ceramic output capacitor for stability. at light loads in pulse skip mode, the inductor current may reach zero on each pulse which will turn off the n-channel mosfet synchronous recti? er. in this case, the switch node (sw1) goes high impedance and the switch node voltage will ring. this is discontinuous operation, and is normal be- havior for a switching regulator. at very light loads in pulse skip mode, the buck switching regulator will automatically skip pulses as needed to maintain output regulation. at high duty cycle (v out > pv in1 /2) in pulse skip mode, it is possible for the inductor current to reverse causing the buck converter to switch continuously. regulation and low noise operation are maintained but the input supply current will increase to a couple ma due to the continuous gate switching. during burst mode operation, the buck switching regula- tor automatically switches between ? xed frequency pwm operation and hysteretic control as a function of the load current. at light loads the buck switching regulator controls the inductor current directly and use a hysteretic control loop to minimize both noise and switching losses. during burst mode operation, the output capacitor is charged to a voltage slightly higher than the regulation point. the buck switching regulator then goes into sleep mode, during which the output capacitor provides the load current. in sleep mode, most of the switching regulators circuitry is powered down, helping conserve battery power. when the output voltage drops below a pre-determined value, the buck switching regulator circuitry is powered on and another burst cycle begins. the sleep time decreases as the load current increases. beyond a certain load current point (about 1/4 rated output load current) the buck switching regulator will switch to a low noise constant-frequency pwm mode of operation, much the same as pulse skip operation at high loads. for applications that can tolerate some output ripple at low output currents, burst mode operation provides better ef? ciency than pulse skip at light loads. the buck switching regulator allows mode transition on- the-? y, providing seamless transition between modes even under load. this allows the user to switch back and forth between modes to reduce output ripple or increase low current ef? ciency as needed. burst mode operation is set by driving the mode pin high, while pulse skip mode is achieved by driving the mode pin low. buck switching regulator in shutdown the buck switching regulator is in shutdown when not enabled for operation. in shutdown, all circuitry in the buck switching regulator is disconnected from the regulator input supply, leaving only a few nanoamps of leakage pulled to ground through a 13k resistor on the switch (sw1) pin when in shutdown. buck switching regulator dropout operation it is possible for the buck switching regulators input volt- age to approach its programmed output voltage (e.g., a battery voltage of 3.4v with a programmed output voltage of 3.3v). when this happens, the pmos switch duty cycle increases until it is turned on continuously at 100%. in this dropout condition, the respective output voltage equals the regulators input voltage minus the voltage drops across the internal p-channel mosfet and the inductor.
ltc3558 23 3558f applications information buck switching regulator soft-start operation soft-start is accomplished by gradually increasing the peak inductor current for each switching regulator over a 500 r s period. this allows an output to rise slowly, helping mini- mize the battery in-rush current required to charge up the regulators output capacitor. a soft-start cycle occurs when the buck switcher ? rst turns on, or after a fault condition has occurred (thermal shutdown or uvlo). a soft-start cycle is not triggered by changing operating modes using the mode pin. this allows seamless output operation when transitioning between operating modes. buck switching regulator switching slew rate control the buck switching regulator contains circuitry to limit the slew rate of the switch node (sw1). this circuitry is designed to transition the switch node over a period of a couple of nanoseconds, signi? cantly reducing radiated emi and conducted supply noise while maintaining high ef? ciency. buck switching regulator low supply operation an undervoltage lockout (uvlo) circuit on pv in1 shuts down the step-down switching regulators when bat drops below 2.45v. this uvlo prevents the buck switching regu- lator from operating at low supply voltages where loss of regulation or other undesirable operation may occur. buck switching regulator inductor selection the buck switching regulator is designed to work with inductors in the range of 2.2h to 10h, but for most applications a 4.7h inductor is suggested. larger value inductors reduce ripple current which improves output ripple voltage. lower value inductors result in higher ripple current which improves transient response time. to maximize ef? ciency, choose an inductor with a low dc resistance. for a 1.2v output ef? ciency is reduced about 2% for every 100m < series resistance at 400ma load current, and about 2% for every 300m < series resistance at 100ma load current. choose an inductor with a dc current rating at least 1.5 times larger than the maximum load current to ensure that the inductor does not saturate during normal operation. if output short-circuit is a possible condition the inductor should be rated to handle the maximum peak current speci? ed for the buck regulators. different core materials and shapes will change the size/cur- rent and price/current relationship of an inductor. toroid or shielded pot cores in ferrite or permalloy materials are small and dont radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. inductors that are very thin or have a very small volume typically have much higher dcr losses, and will not give the best ef? ciency. the choice of which style inductor to use often depends more on the price vs size, performance, and any radiated emi requirements than on what the buck regulator requires to operate. the inductor value also has an effect on burst mode operation. lower inductor values will cause burst mode switching frequency to increase.
ltc3558 24 3558f table 2 shows several inductors that work well with the ltc3558 buck switching regulator. these inductors offer a good compromise in current rating, dcr and physical size. consult each manufacturer for detailed information on their entire selection of inductors. buck switching regulator input/output capacitor selection low esr (equivalent series resistance) ceramic capacitors should be used at switching regulator outputs as well as the switching regulator input supply. ceramic capacitor dielectrics are a compromise between high dielectric constant and stability versus temperature and versus dc bias voltage. the x5r/x7r dielectrics offer the best compromise with high dielectric constant and acceptable performance over temperature and under bias. do not use y5v dielectrics. a 10f output capacitor is suf? cient applications information for most applications. for good transient response and stability the output capacitor should retain at least 4 r f of capacitance over operating temperature and bias volt- age. the buck switching regulator input supply should be bypassed with a 10f capacitor. consult manufacturer for detailed information on their selection and speci? ca- tions of ceramic capacitors. many manufacturers now offer very thin (< 1mm tall) ceramic capacitors ideal for use in height-restricted designs. table 3 shows a list of several ceramic capacitor manufacturers. table 3: recommended ceramic capacitor manufacturers avx (803) 448-9411 www.avxcorp.com murata (714) 852-2001 www.murata.com taiyo yuden (408) 537-4150 www.t-yuden.com tdk (888) 835-6646 www.tdk.com table 2. recommended inductors for buck switching regulators inductor type l (h) max i dc (a) max dcr (m ) size in mm (l w h) manufacturer de2818c de2812c 4.7 4.7 1.25 1.15 72* 130* 3 2.8 1.8 3 2.8 1.2 toko www.toko.com cdrh3d16 4.7 0.9 110 4 4 1.8 sumida www.sumida.com sd3118 sd3112 4.7 4.7 1.3 0.8 162 246 3.1 3.1 1.8 3.1 3.1 1.2 cooper www.cooperet.com lps3015 4.7 1.1 200 3 3 1.5 coilcraft www.coilcraft.com *typical dcr
ltc3558 25 3558f buck-boost switching regulator the ltc3558 contains a 2.25mhz constant-frequency, voltage mode, buck-boost switching regulator. the regu- lator provides up to 400ma of output load current. the buck-boost switching regulator can be programmed for a minimum output voltage of 2.75v and can be used to power a microcontroller core, microcontroller i/o, memory, disk drive, or other logic circuitry. to suit a variety of applica- tions, different mode functions allow the user to trade off noise for ef? ciency. two modes are available to control the operation of the buck-boost regulator. at moderate to heavy loads, the constant-frequency pwm mode provides the least noise switching solution. at lighter loads, burst mode operation may be selected. regulation is maintained by an error ampli? er that compares the divided output voltage with a reference and adjusts the compensation voltage accordingly until the fb2 voltage has stabilized at 0.8v. the buck-boost switching regulator also includes soft-start to limit inrush current and voltage overshoot when powering on, short-circuit current protection, and switch node slew limiting circuitry for reduced radiated emi. buck-boost regulator pwm operating mode in pwm mode, the voltage seen at the feedback node is compared to a 0.8v reference. from the feedback voltage, an error ampli? er generates an error signal seen at the v c2 pin. this error signal controls pwm waveforms that modulate switches a (input pmos), b (input nmos), c (output nmos), and d (output pmos). switches a and b operate synchronously, as do switches c and d. if the input voltage is signi? cantly greater than the programmed output voltage, then the regulator will operate in buck mode. in this case, switches a and b will be modulated, with switch d always on (and switch c always off), to step- down the input voltage to the programmed output. if the input voltage is signi? cantly less than the programmed output voltage, then the converter will operate in boost mode. in this case, switches c and d are modulated, with switch a always on (and switch b always off), to step up the input voltage to the programmed output. if the input voltage is close to the programmed output voltage, then the converter will operate in four-switch mode. while operating in four-switch mode, switches turn on as per the following sequence: switches a and d q switches a and c q switches b and d q switches a and d. buck-boost regulator burst mode operation in burst mode operation, the switching regulator uses a hysteretic feedback voltage algorithm to control the output voltage. by limiting fet switching and using a hysteretic control loop switching losses are greatly reduced. in this mode, output current is limited to 50ma. while in burst mode operation, the output capacitor is charged to a voltage slightly higher than the regulation point. the buck-boost converter then goes into a sleep state, dur- ing which the output capacitor provides the load current. the output capacitor is charged by charging the inductor until the input current reaches 250ma typical, and then discharging the inductor until the reverse current reaches 0ma typical. this process of bursting current is repeated until the feedback voltage has charged to the reference voltage plus 6mv (806mv typical). in the sleep state, most of the regulators circuitry is powered down, helping to conserve battery power. when the feedback voltage drops below the reference voltage minus 6mv (794mv typical), the switching regulator circuitry is powered on and another burst cycle begins. the duration for which the regulator operates in sleep depends on the load current and output capacitor value. the sleep time decreases as the load current increases. the maximum deliverable load current in burst mode operation is 50ma typical. the buck-boost regulator may not enter sleep if the load current is greater than 50ma. if the load current increases beyond this point while in burst mode operation, the out- put may lose regulation. burst mode operation provides a signi? cant improvement in ef? ciency at light loads at the expense of higher output ripple when compared to pwm mode. for many noise-sensitive systems, burst mode operation might be undesirable at certain times (i.e., dur- ing a transmit or receive cycle of a wireless device), but highly desirable at others (i.e., when the device is in low power standby mode). applications information
ltc3558 26 3558f the output ? lter zero is given by: f rc hz filter zero esr out _ ?? ? = 1 2 u where r esr is the capacitor equivalent series resistance. a troublesome feature in boost mode is the right-half plane zero (rhp), and is given by: f pv ilv hz rhpz in out out = 2 2 2 2? ? ? ? u the loop gain is typically rolled off before the rhp zero frequency. a simple type i compensation network, as shown in figure 10, can be incorporated to stabilize the loop, but at the cost of reduced bandwidth and slower transient response. to ensure proper phase margin, the loop requires to be crossed over a decade before the lc double pole. the unity-gain frequency of the error ampli? er with the type i compensation is given by: f rc hz ug p ?? ? = 1 21 1 u buck-boost switching regulator output voltage programming the buck-boost switching regulator can be programmed for output voltages greater than 2.75v and less than 5.45v. to program the output voltage, a resistor divider is con- nected between v out2 and the feedback node (fb2) as shown in figure 9. the output voltage is given by v out2 = 0.8(1 + r1/r2). applications information figure 10. error ampli? er with type i compensation r1 r2 3558 f10 0.8v fb2 v c2 c p1 v out2 C + error amp figure 9. programming the buck-boost output voltage requires a resistor divider connected between v out2 and fb2 ltc3558 fb2 v out2 r2 r1 3558 f09 closing the feedback loop the ltc3558 incorporates voltage mode pwm control. the control to output gain varies with operation region (buck, boost, buck-boost), but is usually no greater than 20. the output ? lter exhibits a double pole response given by: f lc hz filter pole out _ ?? ? = 1 2 u where c out is the output ? lter capacitor.
ltc3558 27 3558f figure 11. error ampli? er with type iii compensation most applications demand an improved transient response to allow a smaller output ? lter capacitor. to achieve a higher bandwidth, type iii compensation is required. two zeros are required to compensate for the double-pole response. type iii compensation also reduces any v out2 overshoot seen during a start-up condition. a type iii compensa- tion circuit is shown in figure 11 and yields the following transfer function: v vrcc sr c s r r c c out 2 2 1 11 2 1221 133 = + +++ () ? ()[()] s ssrcc src 1212133 + ? ? ? ? + (|| )( ) a type iii compensation network attempts to introduce a phase bump at a higher frequency than the lc double pole. this allows the system to cross unity gain after the lc double pole, and achieve a higher bandwidth. while attempting to cross over after the lc double pole, the system must still cross over before the boost right-half plane zero. if unity gain is not reached suf? ciently before the right-half plane zero, then the C180 of phase lag from the lc double pole combined with the C90 of phase lag from the right-half plane zero will result in negating the phase bump of the compensator. the compensator zeros should be placed either before or only slightly after the lc double pole such that their positive phase contributions offset the C180 that occurs at the ? lter double pole. if they are placed at too low of a frequency, they will introduce too much gain to the system and the crossover frequency will be too high. the two high frequency poles should be placed such that the system crosses unity gain during the phase bump introduced by the zeros and before the boost right-half plane zero and such that the compensator bandwidth is less than the bandwidth of the error amp (typically 900khz). if the gain of the compensation network is ever greater than the gain of the error ampli? er, then the error ampli? er no longer acts as an ideal op amp, and another pole will be introduced at the same point. recommended type iii compensation components for a 3.3v output are: r1: 324k < r fb : 105k < c1: 10pf r2: 15k c2: 330pf r3: 121k < c3: 33pf c out : 22f l out : 2.2h applications information r1 c3 r fb 3558 f11 0.8v fb2 v c2 c2 r2 v out2 C + error amp c1 r3
ltc3558 28 3558f table 4. recommended inductors for the buck-boost switching regulator. inductor type l (h) max i dc (a) max dcr (m ) size in mm (l w h) manufacturer db3018c d312c de2812c de2812c 2.4 2.2 2 2.7 1.31 1.14 1.4 1.2 80 140 81 87 3.8 3.8 1.4 3.6 3.6 1.2 3 3.2 1.2 3 3.2 1.2 toko www.toko.com cdrh3d16 2.2 1.2 72 4 4 1.8 sumida www.sumida.com sd12 2.2 1.8 74 5.2 5.2 1.2 cooper www.cooperet.com *typical dcr applications information input current limit the input current limit comparator will shut the input pmos switch off once current exceeds 700ma typical. before the switch current limit, the average current limit amp (620ma typical) will source current into the feedback pin to drop the output voltage. the input current limit also protects against a short-circuit condition at the v out2 pin. reverse current limit the reverse current limit comparator will shut the output pmos switch off once current returning from the output exceeds 450ma typical. output overvoltage protection if the feedback node were inadvertently shorted to ground, then the output would increase inde? nitely with the maxi- mum current that could be sourced from the input supply. the buck-boost regulator protects against this by shutting off the input pmos if the output voltage exceeds a 5.75v maximum. buck-boost regulator soft-start operation soft-start is accomplished by gradually increasing the reference voltage over a 500s typical period. a soft- start cycle occurs whenever the buck-boost is enabled, or after a fault condition has occurred (thermal shutdown or uvlo). a soft-start cycle is not triggered by changing operating modes. this allows seamless output operation when transitioning between burst mode operation and pwm mode operation. buck-boost switching regulator inductor selection the buck-boost switching regulator is designed to work with inductors in the range of 1h to 5h. for most applications, a 2.2h inductor will suf? ce. larger value inductors reduce ripple current which improves output ripple voltage. lower value inductors result in higher ripple current and improved transient response time. to maximize ef? ciency, choose an inductor with a low dc resistance and a dc current rating at least 1.5 times larger than the maximum load current to ensure that the inductor does not saturate during normal operation. if output short-circuit is a possible condition, the inductor current should be rated to handle up to the peak current speci? ed for the buck-boost regulator. the inductor value also affects burst mode operation. lower inductor values will cause burst mode switching frequencies to increase. different core materials and shapes will change the size/cur- rent and price/current relationship of an inductor. toroid or shielded pot cores in ferrite or permalloy materials are small and do not radiate much energy, but cost more than powdered iron core inductors with similar electrical characteristics. inductors that are very thin or have a very small volume typically have much higher core and dcr losses and will not give the best ef? ciency. table 4 shows some inductors that work well with the buck-boost regulator. these inductors offer a good com- promise in current rating, dcr and physical size. consult each manufacturer for detailed information on their entire selection of inductors.
ltc3558 29 3558f applications information buck-boost switching regulator input/output capacitor selection low esr (equivalent series resistance) ceramic capacitors should be used at both the buck-boost regulator input (pv in2 ) and the output (v out2 ). it is recommended that the input be bypassed with a 10f capacitor. the output should be bypassed with at least a 10f capacitor if using type i compensation and 22f if using type iii compensation. the same selection criteria apply for the buck-boost regulator input and output capacitors as described in the buck switching regulator input/output capacitor selec- tion section. pcb layout considerations in order to deliver maximum charge current under all conditions, it is critical that the backside of the ltc3558 be soldered to the pc board ground. the ltc3558 has dual switching regulators. as with all switching regulators, care must be taken while laying out a pc board and placing components. the input decoupling capacitors, the output capacitor and the inductors must all be placed as close to the pins as possible and on the same side of the board as the ltc3558. all connections must also be made on the same layer. place a local unbroken ground plane below these components. avoid routing noisy high frequency lines such as those that connect to switch pins over or parallel to lines that drive high imped- ance inputs.
ltc3558 30 3558f typical applications v cc ntc prog susp hpwr en1 4.7h 10f 649k 806k 150pf 15k 10f 10pf up to 500ma ltc3558 gnd 2.2h 1.74k en2 mode bat digital control sw1 fb1 swab2 swcd2 v out2 fb2 v c2 1.8v at 400ma single li-lon cell (2.7v to 4.2v) 200k 619k 3.3v at 400ma 3558 ta02 + chrg 4.7f 1 10f 110k 100k (ntc) nth50603no1 510 usb (4.3v to 5.5v) or ac adapter 28.7k gnd2 (exposed pad) pv in1 pv in2 10f figure 12. li-ion to 3.3v at 400ma, 1.8v at 400ma and usb-compatible battery charger as shown in figure 12, the ltc3558 can be operated with no battery connected to the bat pin. a 1 < resistor in series with a 4.7f capacitor at the bat pin ensures battery charger stability. 10f v cc decoupling capacitors are required for proper operation of the dc/dc converters. a three-resistor bias network for ntc sets hot and cold trip points at approximately 55c and 0c. the battery can be charged with up to 950ma of charge current when powered from a 5v wall adaptor, as shown in figure 13. chrg has a led to provide a user with a visual indication of battery charge status. the buck-boost regulator starts up only after v out1 is up to approximately 0.7v. this provides a sequencing function which may be desirable in applications where a microprocessor needs to be powered up before peripherals. a type iii compensation network improves the transient response of the buck-boost switching regulator.
ltc3558 31 3558f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description ud package 20-lead plastic qfn (3mm 3mm) (reference ltc dwg # 05-08-1720 rev a) 3.00 0.10 (4 sides) recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 1.65 0.05 note: 1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 bottom viewexposed pad 1.65 0.10 (4-sides) 0.75 0.05 r = 0.115 typ r = 0.05 typ 0.20 0.05 1 pin 1 notch r = 0.20 typ or 0.25 45 chamfer 19 20 2 0.40 bsc 0.200 ref 2.10 0.05 3.50 0.05 (4 sides) 0.70 0.05 0.00 C 0.05 (ud20) qfn 0306 rev a 0.20 0.05 0.40 bsc package outline
ltc3558 32 3558f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2008 lt 0408 ? printed in usa related parts part number description comments ltc3550 dual input usb/ac adapter li-ion battery charger with adjustable output 600ma buck converter synchronous buck converter, ef? ciency: 93%, adjustable output at 600ma, charge current: 950ma programmable, usb compatible, automatic input power detection and selection ltc3552 standalone linear li-ion battery charger with adjustable output dual synchronous buck converter synchronous buck converter, ef? ciency: >90%, adjustable outputs at 800ma and 400ma, charge current programmable up to 950ma, usb compatible, 5mm 3mm dfn-16 package ltc3552-1 standalone linear li-ion battery charger with dual synchronous buck converter synchronous buck converter, ef? ciency: >90%, outputs 1.8v at 800ma and 1.575 at 400ma, charge current programmable up to 950ma, usb compatible ltc3455 dual dc/dc converter with usb power manager and li-ion battery charger seamless transition between input power sources: li-ion battery, usb and 5v wall adapter, two high ef? ciency dc/dc converters: up to 96%, full featured li-ion battery charger with accurate usb current limiting (500ma/100ma) pin-selectable burst mode operation, hot swap tm output for sdio and memory cards, 4mm 4mm qfn-24 package ltc3456 2-cell, multi-output dc/dc converter with usb power manager seamless transition between 2-cell battery, usb and ac wall adapter input power sources, main output: fixed 3.3v output, core output: adjustable from 0.8v to v batt(min) , hot swap output for memory cards, power supply sequencing: main and hot swap accurate usb current limiting, high frequency operation: 1mhz, high ef? ciency: up to 92%, 4mm 4mm qfn-24 package ltc3559 usb charger with dual buck regulators adjustable, synchronous buck converters, ef? ciency >90%, outputs: down to 0.8v at 400ma each, charge current programmable up to 950ma, usb-compatible, 3mm 3mm qfn-16 package ltc4080 500ma standalone charger with 300ma synchronous buck charges single-cell li-ion batteries, timer termination + c/10, thermal regulation, buck output: 0.8v to v bat , buck input v in : 2.7v to 5.5v, 3mm 3mm dfn-10 package hot swap is a trademark of linear technology corporation. typical applications v cc ntc prog susp hpwr mode 4.7h 10f 649k 324k 22f 10pf up to 950ma ltc3558 gnd 2.2h 887 en1 en2 bat digital control sw1 fb1 swab2 swcd2 v out2 fb2 v c2 1.2v at 400ma single li-lon cell (2.7v to 4.2v) 105k 15k 324k 121k 33pf 330pf 10pf 3.3v at 400ma 3558 ta03 + chrg 1f 100k 100k (ntc) 510 5v wall adapter gnd2 (exposed pad) pv in1 pv in2 10f figure 13. battery charger can charge a battery with up to 950ma when powered from a wall adapter

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